Your prime source for MIPI® CSI2 IP cores

VLSI Plus was founded by Yoav Lavi, a veteran VLSI designer and design manager with numerous designs, including some 20 original patents in all areas of VLSI.


VLSI Plus has been a contributing member of  MIPI® since 2003, and helped create MIPI® CSI2 and DPHY standards.

Starting with a first CSI2/CCP receiver IP core debuted in 2004, VLSI Plus has been providing CSI2-compliant Tx and Rx IP cores for the last 18 years, for FPGA and ASIC targets.

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